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74AUP1T1326GT vs 74AUP2G126GM,125 feature comparison

74AUP1T1326GT Nexperia

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74AUP2G126GM,125 NXP Semiconductors

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NEXPERIA NXP SEMICONDUCTORS
Package Description VSSOP, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1. QFN-8
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family AUP/ULP/V AUP/ULP/V
JESD-30 Code R-PDSO-G8 S-PBCC-B8
Length 1.95 mm 1.6 mm
Logic IC Type BUS DRIVER BUS DRIVER
Moisture Sensitivity Level 1 1
Number of Bits 1 1
Number of Functions 1 2
Number of Ports 2 2
Number of Terminals 8 8
Operating Temperature-Max 85 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity TRUE TRUE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code VSSOP VBCC
Package Shape RECTANGULAR SQUARE
Package Style SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH CHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Cel) 260 260
Propagation Delay (tpd) 17.3 ns 24 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 0.5 mm 0.5 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 1.1 V 0.8 V
Supply Voltage-Nom (Vsup) 1.4 V 1.1 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL AUTOMOTIVE
Terminal Form GULL WING BUTT
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position DUAL BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 30
Width 1 mm 1.6 mm
Base Number Matches 2 2
Part Package Code QFN
Pin Count 8
Manufacturer Package Code SOT902-2
Control Type ENABLE HIGH
JESD-609 Code e4
Load Capacitance (CL) 30 pF
Max I(ol) 0.0017 A
Package Equivalence Code LCC8,.06SQ,20
Packing Method TR
Prop. Delay@Nom-Sup 24 ns
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Logic » Bus Driver/Transceivers
Logic » Bus Driver/Transceivers

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