74ALVC16541DGG
vs
74LVCH162244APAG
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Transferred
Transferred
Ihs Manufacturer
NXP SEMICONDUCTORS
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
TSSOP,
TSSOP-48
Reach Compliance Code
unknown
compliant
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
WITH DUAL OUTPUT ENABLE
Family
ALVC/VCX/A
LVC/LCX/Z
JESD-30 Code
R-PDSO-G48
R-PDSO-G48
Length
12.5 mm
12.5 mm
Load Capacitance (CL)
50 pF
50 pF
Logic IC Type
BUS DRIVER
BUS DRIVER
Number of Bits
8
4
Number of Functions
2
4
Number of Ports
2
2
Number of Terminals
48
48
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
Output Characteristics
3-STATE
3-STATE WITH SERIES RESISTOR
Output Polarity
TRUE
TRUE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TSSOP
TSSOP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd)
3.6 ns
5.6 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
1.2 mm
1.1 mm
Supply Voltage-Max (Vsup)
3.6 V
3.6 V
Supply Voltage-Min (Vsup)
1.2 V
2.7 V
Supply Voltage-Nom (Vsup)
3.3 V
3.3 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
INDUSTRIAL
Terminal Form
GULL WING
GULL WING
Terminal Pitch
0.5 mm
0.5 mm
Terminal Position
DUAL
DUAL
Width
6.1 mm
6.1 mm
Base Number Matches
3
3
Pbfree Code
Rohs Code
Part Package Code
TSSOP
Pin Count
48
Manufacturer Package Code
PAG48
ECCN Code
EAR99
Date Of Intro
1998-10-01
Control Type
ENABLE LOW
JESD-609 Code
e3
Max I(ol)
0.012 A
Moisture Sensitivity Level
1
Package Equivalence Code
TSSOP48,.3,20
Peak Reflow Temperature (Cel)
260
Prop. Delay@Nom-Sup
4.4 ns
Terminal Finish
MATTE TIN
Time@Peak Reflow Temperature-Max (s)
30
Compare 74ALVC16541DGG with alternatives
Compare 74LVCH162244APAG with alternatives