72V201L15JG vs 72201L15JGI feature comparison

72V201L15JG Integrated Device Technology Inc

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72201L15JGI Renesas Electronics Corporation

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Pbfree Code Yes
Rohs Code Yes Yes
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC RENESAS ELECTRONICS CORP
Part Package Code QFJ
Package Description QCCJ, LDCC32,.5X.6
Pin Count 32
Reach Compliance Code compliant compliant
ECCN Code EAR99
HTS Code 8542.32.00.71
Access Time-Max 10 ns 10 ns
Clock Frequency-Max (fCLK) 66.7 MHz
Cycle Time 15 ns 15 ns
JESD-30 Code R-PQCC-J32 R-PLCC-J32
JESD-609 Code e3 e3
Length 13.9954 mm
Memory Density 2304 bit 2304 bit
Memory IC Type OTHER FIFO OTHER FIFO
Memory Width 9 9
Moisture Sensitivity Level 3 1
Number of Functions 1 1
Number of Terminals 32 32
Number of Words 256 words 256 words
Number of Words Code 256 256
Operating Mode SYNCHRONOUS SYNCHRONOUS
Operating Temperature-Max 70 °C 85 °C
Operating Temperature-Min -40 °C
Organization 256X9 256X9
Output Enable YES YES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC32,.5X.6
Package Shape RECTANGULAR RECTANGULAR
Package Style CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 260 260
Qualification Status Not Qualified Not Qualified
Seated Height-Max 3.556 mm
Standby Current-Max 0.005 A 0.005 A
Supply Current-Max 0.02 mA 0.035 mA
Supply Voltage-Max (Vsup) 3.6 V 5.5 V
Supply Voltage-Min (Vsup) 3 V 4.5 V
Supply Voltage-Nom (Vsup) 3.3 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL INDUSTRIAL
Terminal Finish Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal Form J BEND J BEND
Terminal Pitch 1.27 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 30 30
Width 11.4554 mm
Base Number Matches 8 2
Output Characteristics 3-STATE

Compare 72V201L15JG with alternatives

Compare 72201L15JGI with alternatives