7202LA12TPG
vs
IDT7202LA12PDG
feature comparison
| Pbfree Code |
Yes
|
Yes
|
| Rohs Code |
Yes
|
Yes
|
| Part Life Cycle Code |
Active
|
Transferred
|
| Ihs Manufacturer |
RENESAS ELECTRONICS CORP
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part Package Code |
PDIP
|
DIP
|
| Package Description |
GREEN, PLASTIC, DIP-28
|
0.600 INCH, GREEN, PLASTIC, DIP-28
|
| Pin Count |
28
|
28
|
| Manufacturer Package Code |
PTG28
|
|
| Reach Compliance Code |
compliant
|
compliant
|
| ECCN Code |
NLR
|
EAR99
|
| HTS Code |
8542320071
|
8542.32.00.71
|
| Factory Lead Time |
26 Weeks, 1 Day
|
|
| Samacsys Manufacturer |
Renesas Electronics
|
|
| Access Time-Max |
12 ns
|
12 ns
|
| Additional Feature |
RETRANSMIT
|
RETRANSMIT
|
| Clock Frequency-Max (fCLK) |
50 MHz
|
50 MHz
|
| Cycle Time |
20 ns
|
20 ns
|
| JESD-30 Code |
R-PDIP-T28
|
R-PDIP-T28
|
| JESD-609 Code |
e3
|
e3
|
| Length |
34.671 mm
|
36.576 mm
|
| Memory Density |
9216 bit
|
9216 bit
|
| Memory IC Type |
OTHER FIFO
|
OTHER FIFO
|
| Memory Width |
9
|
9
|
| Moisture Sensitivity Level |
1
|
1
|
| Number of Functions |
1
|
1
|
| Number of Terminals |
28
|
28
|
| Number of Words |
1024 words
|
1024 words
|
| Number of Words Code |
1000
|
1000
|
| Operating Mode |
ASYNCHRONOUS
|
ASYNCHRONOUS
|
| Operating Temperature-Max |
70 °C
|
70 °C
|
| Operating Temperature-Min |
|
|
| Organization |
1KX9
|
1KX9
|
| Output Enable |
NO
|
NO
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
DIP
|
DIP
|
| Package Equivalence Code |
DIP28,.3
|
DIP28,.6
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Parallel/Serial |
PARALLEL
|
PARALLEL
|
| Peak Reflow Temperature (Cel) |
260
|
260
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
4.572 mm
|
4.699 mm
|
| Standby Current-Max |
0.005 A
|
0.005 A
|
| Supply Current-Max |
0.08 mA
|
0.08 mA
|
| Supply Voltage-Max (Vsup) |
5.5 V
|
5.5 V
|
| Supply Voltage-Min (Vsup) |
4.5 V
|
4.5 V
|
| Supply Voltage-Nom (Vsup) |
5 V
|
5 V
|
| Surface Mount |
NO
|
NO
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL
|
COMMERCIAL
|
| Terminal Finish |
Matte Tin (Sn) - annealed
|
Matte Tin (Sn) - annealed
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Pitch |
2.54 mm
|
2.54 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
7.62 mm
|
15.24 mm
|
| Base Number Matches |
1
|
1
|
| Time@Peak Reflow Temperature-Max (s) |
|
30
|
|
|
|
Compare 7202LA12TPG with alternatives
Compare IDT7202LA12PDG with alternatives