7201LA50DB
vs
IDT7201LA50PDG
feature comparison
| Pbfree Code |
No
|
Yes
|
| Rohs Code |
No
|
Yes
|
| Part Life Cycle Code |
Transferred
|
Transferred
|
| Ihs Manufacturer |
INTEGRATED DEVICE TECHNOLOGY INC
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part Package Code |
CDIP
|
DIP
|
| Package Description |
0.600 INCH, CERAMIC, DIP-28
|
DIP, DIP28,.6
|
| Pin Count |
28
|
28
|
| Manufacturer Package Code |
CD28
|
|
| Reach Compliance Code |
not_compliant
|
compliant
|
| ECCN Code |
EAR99
|
EAR99
|
| HTS Code |
8542.32.00.71
|
8542.32.00.71
|
| Date Of Intro |
1988-01-01
|
|
| Access Time-Max |
50 ns
|
50 ns
|
| Additional Feature |
RETRANSMIT
|
RETRANSMIT
|
| Clock Frequency-Max (fCLK) |
15 MHz
|
15 MHz
|
| Cycle Time |
65 ns
|
65 ns
|
| JESD-30 Code |
R-GDIP-T28
|
R-PDIP-T28
|
| JESD-609 Code |
e0
|
e3
|
| Length |
37.211 mm
|
36.576 mm
|
| Memory Density |
4608 bit
|
4608 bit
|
| Memory IC Type |
OTHER FIFO
|
OTHER FIFO
|
| Memory Width |
9
|
9
|
| Moisture Sensitivity Level |
1
|
1
|
| Number of Functions |
1
|
1
|
| Number of Terminals |
28
|
28
|
| Number of Words |
512 words
|
512 words
|
| Number of Words Code |
512
|
512
|
| Operating Mode |
ASYNCHRONOUS
|
ASYNCHRONOUS
|
| Operating Temperature-Max |
125 °C
|
70 °C
|
| Operating Temperature-Min |
-55 °C
|
|
| Organization |
512X9
|
512X9
|
| Output Enable |
NO
|
NO
|
| Package Body Material |
CERAMIC, GLASS-SEALED
|
PLASTIC/EPOXY
|
| Package Code |
DIP
|
DIP
|
| Package Equivalence Code |
DIP28,.6
|
DIP28,.6
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Parallel/Serial |
PARALLEL
|
PARALLEL
|
| Peak Reflow Temperature (Cel) |
240
|
260
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Screening Level |
MIL-STD-883 Class B
|
|
| Seated Height-Max |
5.08 mm
|
4.699 mm
|
| Standby Current-Max |
0.0009 A
|
0.005 A
|
| Supply Current-Max |
0.1 mA
|
0.08 mA
|
| Supply Voltage-Max (Vsup) |
5.5 V
|
5.5 V
|
| Supply Voltage-Min (Vsup) |
4.5 V
|
4.5 V
|
| Supply Voltage-Nom (Vsup) |
5 V
|
5 V
|
| Surface Mount |
NO
|
NO
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
MILITARY
|
COMMERCIAL
|
| Terminal Finish |
TIN LEAD
|
Matte Tin (Sn) - annealed
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Pitch |
2.54 mm
|
2.54 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
15.24 mm
|
15.24 mm
|
| Base Number Matches |
6
|
3
|
| Time@Peak Reflow Temperature-Max (s) |
|
30
|
|
|
|
Compare 7201LA50DB with alternatives
Compare IDT7201LA50PDG with alternatives