7201LA35P vs 7201LA35DG feature comparison

7201LA35P Integrated Device Technology Inc

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7201LA35DG Integrated Device Technology Inc

Buy Now Datasheet
Pbfree Code No Yes
Rohs Code No Yes
Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code PDIP
Package Description 0.600 INCH, PLASTIC, DIP-28 DIP, DIP28,.6
Pin Count 28
Manufacturer Package Code PD28
Reach Compliance Code not_compliant compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.71 8542.32.00.71
Access Time-Max 35 ns 35 ns
Additional Feature RETRANSMIT
Clock Frequency-Max (fCLK) 22.2 MHz 22.2 MHz
Cycle Time 45 ns 45 ns
JESD-30 Code R-PDIP-T28 R-CDIP-T28
JESD-609 Code e0 e3
Length 36.576 mm
Memory Density 4608 bit 4608 bit
Memory IC Type OTHER FIFO OTHER FIFO
Memory Width 9 9
Moisture Sensitivity Level 1
Number of Functions 1 1
Number of Terminals 28 28
Number of Words 512 words 512 words
Number of Words Code 512 512
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 512X9 512X9
Output Enable NO NO
Package Body Material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
Package Code DIP DIP
Package Equivalence Code DIP28,.6 DIP28,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 240
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.699 mm
Standby Current-Max 0.0005 A 0.005 A
Supply Current-Max 0.125 mA 0.08 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD MATTE TIN
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 20
Width 15.24 mm
Base Number Matches 1 1

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