709279L12GI
vs
IDT709279S12G
feature comparison
All Stats
Differences Only
Pbfree Code
No
No
Rohs Code
No
No
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
INTEGRATED DEVICE TECHNOLOGY INC
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
PGA-108
PGA, PGA108,12X12
Reach Compliance Code
not_compliant
not_compliant
ECCN Code
3A991.B.2.B
EAR99
HTS Code
8542.32.00.41
8542.32.00.41
Access Time-Max
12 ns
25 ns
Additional Feature
FLOW-THROUGH OR PIPELINED ARCHITECTURE
FLOW-THROUGH OR PIPELINED ARCHITECTURE
Clock Frequency-Max (fCLK)
50 MHz
50 MHz
I/O Type
COMMON
COMMON
JESD-30 Code
X-CPGA-P108
S-CPGA-P108
JESD-609 Code
e0
e0
Memory Density
524288 bit
524288 bit
Memory IC Type
APPLICATION SPECIFIC SRAM
MULTI-PORT SRAM
Memory Width
16
16
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
108
108
Number of Words
32768 words
32768 words
Number of Words Code
32000
32000
Operating Mode
SYNCHRONOUS
SYNCHRONOUS
Operating Temperature-Max
85 °C
70 °C
Operating Temperature-Min
-40 °C
Organization
32KX16
32KX16
Output Characteristics
3-STATE
3-STATE
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
PGA
PGA
Package Equivalence Code
PGA108,12X12
PGA108,12X12
Package Shape
UNSPECIFIED
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Parallel/Serial
PARALLEL
PARALLEL
Qualification Status
Not Qualified
Not Qualified
Standby Current-Max
0.005 A
0.015 A
Standby Voltage-Min
4.5 V
4.5 V
Supply Current-Max
0.34 mA
0.345 mA
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
COMMERCIAL
Terminal Finish
TIN LEAD
TIN LEAD
Terminal Form
PIN/PEG
PIN/PEG
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
PERPENDICULAR
PERPENDICULAR
Base Number Matches
1
1
Part Package Code
PGA
Pin Count
108
Length
30.48 mm
Output Enable
YES
Seated Height-Max
5.207 mm
Width
30.48 mm
Compare 709279L12GI with alternatives
Compare IDT709279S12G with alternatives