709269L12G
vs
IDT709269S12GI
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
INTEGRATED DEVICE TECHNOLOGY INC
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
PGA-108
PGA,
Reach Compliance Code
compliant
compliant
ECCN Code
EAR99
EAR99
HTS Code
8542.32.00.41
8542.32.00.41
Access Time-Max
12 ns
25 ns
Additional Feature
FLOW-THROUGH OR PIPELINED ARCHITECTURE
FLOW-THROUGH OR PIPELINED ARCHITECTURE
Clock Frequency-Max (fCLK)
50 MHz
I/O Type
COMMON
JESD-30 Code
X-CPGA-P108
S-CPGA-P108
JESD-609 Code
e3
e3
Memory Density
262144 bit
262144 bit
Memory IC Type
APPLICATION SPECIFIC SRAM
MULTI-PORT SRAM
Memory Width
16
16
Moisture Sensitivity Level
3
Number of Functions
1
1
Number of Ports
2
Number of Terminals
108
108
Number of Words
16384 words
16384 words
Number of Words Code
16000
16000
Operating Mode
SYNCHRONOUS
SYNCHRONOUS
Operating Temperature-Max
70 °C
85 °C
Operating Temperature-Min
-40 °C
Organization
16KX16
16KX16
Output Characteristics
3-STATE
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
PGA
PGA
Package Equivalence Code
QFP100,.63SQ,20
Package Shape
UNSPECIFIED
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Parallel/Serial
PARALLEL
PARALLEL
Peak Reflow Temperature (Cel)
260
Qualification Status
Not Qualified
Not Qualified
Standby Current-Max
0.005 A
Standby Voltage-Min
4.5 V
Supply Current-Max
0.305 mA
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
INDUSTRIAL
Terminal Finish
Matte Tin (Sn) - annealed
MATTE TIN
Terminal Form
PIN/PEG
PIN/PEG
Terminal Pitch
0.5 mm
2.54 mm
Terminal Position
PERPENDICULAR
PERPENDICULAR
Time@Peak Reflow Temperature-Max (s)
30
Base Number Matches
1
1
Part Package Code
PGA
Pin Count
108
Length
30.48 mm
Seated Height-Max
5.207 mm
Width
30.48 mm
Compare 709269L12G with alternatives
Compare IDT709269S12GI with alternatives