5962R9665601VXX vs 5962R9665601VXC feature comparison

5962R9665601VXX Harris Semiconductor

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5962R9665601VXC Renesas Electronics Corporation

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Part Life Cycle Code Transferred Active
Ihs Manufacturer HARRIS SEMICONDUCTOR RENESAS ELECTRONICS CORP
Package Description , DFP,
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature HOLD MODE; DUAL OUTPUT ENABLE; RADIATION HARDENED HOLD MODE; DUAL OUTPUT ENABLE; RADIATION HARDENED
Family 4000/14000/40000 4000/14000/40000
JESD-30 Code R-CDFP-F16 R-CDFP-F16
Logic IC Type D FLIP-FLOP D FLIP-FLOP
Number of Bits 4 4
Number of Functions 1 1
Number of Terminals 16 16
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity TRUE TRUE
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code DFP DFP
Package Equivalence Code FL16,.3 FL16,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style FLATPACK FLATPACK
Propagation Delay (tpd) 810 ns 810 ns
Qualification Status Not Qualified Not Qualified
Supply Voltage-Max (Vsup) 18 V 18 V
Supply Voltage-Min (Vsup) 3 V 3 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Form FLAT FLAT
Terminal Position DUAL DUAL
Total Dose 100k Rad(Si) V 100k Rad(Si) V
Trigger Type POSITIVE EDGE POSITIVE EDGE
fmax-Min 2.22 MHz 2.22 MHz
Base Number Matches 3 3
JESD-609 Code e4
Screening Level MIL-PRF-38535 Class V
Seated Height-Max 2.92 mm
Terminal Finish GOLD
Terminal Pitch 1.27 mm
Width 6.73 mm

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