5962-8753901LX vs 5962-8975501LA feature comparison

5962-8753901LX Cypress Semiconductor

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5962-8975501LA Defense Logistics Agency

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Part Life Cycle Code Obsolete Active
Ihs Manufacturer CYPRESS SEMICONDUCTOR CORP DEFENSE LOGISTICS AGENCY
Part Package Code DIP
Package Description WDIP, CERAMIC, DIP-24
Pin Count 24
Reach Compliance Code unknown unknown
ECCN Code 3A001.A.2.C
HTS Code 8542.39.00.01
Additional Feature 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
Architecture PAL-TYPE
Clock Frequency-Max 30.3 MHz 30.3 MHz
JESD-30 Code R-GDIP-T24 R-GDIP-T24
Length 31.877 mm 32 mm
Number of Dedicated Inputs 11 11
Number of I/O Lines 10 10
Number of Terminals 24 24
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
Package Code WDIP DIP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE, WINDOW IN-LINE
Programmable Logic Type UV PLD OT PLD
Propagation Delay 25 ns 25 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 5.08 mm
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
JESD-609 Code e0
Peak Reflow Temperature (Cel) NOT SPECIFIED
Screening Level MIL-STD-883
Terminal Finish TIN LEAD
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

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