2N4117A
vs
2N4117A-E3
feature comparison
| Pbfree Code |
Yes
|
|
| Rohs Code |
Yes
|
Yes
|
| Part Life Cycle Code |
Active
|
Obsolete
|
| Ihs Manufacturer |
LINEAR INTEGRATED SYSTEMS INC
|
VISHAY INTERTECHNOLOGY INC
|
| Part Package Code |
TO-72
|
|
| Pin Count |
4
|
|
| Reach Compliance Code |
compliant
|
unknown
|
| ECCN Code |
EAR99
|
EAR99
|
| Additional Feature |
ULTRA HIGH INPUT IMPEDANCE
|
LOW NOISE
|
| Configuration |
SINGLE
|
SINGLE
|
| FET Technology |
JUNCTION
|
JUNCTION
|
| Feedback Cap-Max (Crss) |
1.5 pF
|
1.5 pF
|
| JEDEC-95 Code |
TO-72
|
TO-206AF
|
| JESD-30 Code |
O-MBCY-W4
|
O-MBCY-W4
|
| Number of Elements |
1
|
1
|
| Number of Terminals |
4
|
4
|
| Operating Mode |
DEPLETION MODE
|
DEPLETION MODE
|
| Operating Temperature-Max |
175 °C
|
175 °C
|
| Package Body Material |
METAL
|
METAL
|
| Package Shape |
ROUND
|
ROUND
|
| Package Style |
CYLINDRICAL
|
CYLINDRICAL
|
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED
|
|
| Polarity/Channel Type |
N-CHANNEL
|
N-CHANNEL
|
| Power Dissipation-Max (Abs) |
0.3 W
|
0.3 W
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Surface Mount |
NO
|
NO
|
| Terminal Form |
WIRE
|
WIRE
|
| Terminal Position |
BOTTOM
|
BOTTOM
|
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED
|
|
| Transistor Element Material |
SILICON
|
SILICON
|
| Base Number Matches |
3
|
1
|
| Package Description |
|
HERMETIC SEALED, TO-72, 4 PIN
|
| Samacsys Manufacturer |
|
Vishay
|
| JESD-609 Code |
|
e3
|
| Moisture Sensitivity Level |
|
1
|
| Terminal Finish |
|
MATTE TIN
|
| Transistor Application |
|
AMPLIFIER
|
|
|
|
Compare 2N4117A with alternatives
Compare 2N4117A-E3 with alternatives