1N5312-1E3
vs
JANHCA1N5312
feature comparison
Pbfree Code |
Yes
|
|
Rohs Code |
Yes
|
No
|
Part Life Cycle Code |
Transferred
|
Transferred
|
Ihs Manufacturer |
MICROSEMI CORP
|
MICROSEMI CORP
|
Part Package Code |
DO-7
|
DIE
|
Package Description |
O-LALF-W2
|
HERMETIC SEALED, DIE-2
|
Pin Count |
2
|
2
|
Reach Compliance Code |
compliant
|
compliant
|
ECCN Code |
EAR99
|
EAR99
|
HTS Code |
8541.10.00.70
|
8541.10.00.40
|
Additional Feature |
METALLURGICALLY BONDED, HIGH SOURCE IMPEDANCE
|
|
Case Connection |
ISOLATED
|
CATHODE
|
Configuration |
SINGLE
|
SINGLE
|
Diode Element Material |
SILICON
|
SILICON
|
Diode Type |
CURRENT REGULATOR DIODE
|
CURRENT REGULATOR DIODE
|
Dynamic Impedance-Min |
255000 Ω
|
255000 Ω
|
JEDEC-95 Code |
DO-7
|
|
JESD-30 Code |
O-LALF-W2
|
S-XXUC-N2
|
Limiting Voltage-Max |
2.6 V
|
2.6 V
|
Number of Elements |
1
|
1
|
Number of Terminals |
2
|
2
|
Operating Temperature-Max |
175 °C
|
|
Operating Temperature-Min |
-65 °C
|
|
Package Body Material |
GLASS
|
UNSPECIFIED
|
Package Shape |
ROUND
|
SQUARE
|
Package Style |
LONG FORM
|
UNCASED CHIP
|
Power Dissipation-Max |
0.5 W
|
0.6 W
|
Regulation Current-Nom (Ireg) |
3.9 mA
|
3.9 mA
|
Rep Pk Reverse Voltage-Max |
100 V
|
100 V
|
Surface Mount |
NO
|
YES
|
Technology |
FIELD EFFECT
|
FIELD EFFECT
|
Terminal Finish |
PURE MATTE TIN
|
|
Terminal Form |
WIRE
|
NO LEAD
|
Terminal Position |
AXIAL
|
UNSPECIFIED
|
Base Number Matches |
1
|
4
|
Qualification Status |
|
Not Qualified
|
Reference Standard |
|
MIL-19500/463G
|
|
|
|
Compare 1N5312-1E3 with alternatives
Compare JANHCA1N5312 with alternatives